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HIGH PERFORMANCE LOW NOISE PHEMT * FEATURES 1.0 dB Noise Figure at 18 GHz 10 dB Associated Gain at 18 GHz Low DC Power Consumption
LPS200
GATE BOND PAD (2X) SOURCE BOND PAD (2x)
DRAIN BOND PAD (2X)
DIE SIZE: 12.6X10.2mils (320x260 m) DIE THICKNESS: 3.9 mils (100 m) BONDING PADS: 3.3X2.6 mils (85x65 m)
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DESCRIPTION AND APPLICATIONS The LPS200 is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs) Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam directwrite 0.25 m by 200 m Schottky barrier gate. The recessed "mushroom" gate structure minimizes parasitic gate-source and gate resistances. The epitaxial structure and processing have been optimized for high dynamic range. The LPS200 also features Si3 N4 passivation and is available in various packages. Typical applications are as low noise devices for both narrowband and broadband amplifiers.
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ELECTRICAL SPECIFICATIONS @ TAmbient = 25C
Parameter Saturated Drain-Source Current Noise Figure Associated Gain at minimum NF Maximum Drain-Source Current Transconductance Gate-Source Leakage Current Pinch-Off Voltage Thermal Resistivity frequency=18 GHz Symbol IDSS NF GA IMAX GM IGSO VP JC Test Conditions VDS = 2 V; VGS = 0 V VDS = 2 V; IDS = 25% IDSS VDS = 2 V; IDS = 25% IDSS VDS = 2 V; VGS = 1 V VDS = 2 V; VGS = 0 V VGS = -5 V VDS = 2 V; IDS = 1 mA -0.25 50 9 Min 15 Typ 25 0.7 10 125 70 1 -0.8 285 10 -1.5 Max 50 1.3 Units mA dB dB mA mS A V C/W
Phone: (408) 988-1845 Fax: (408) 970-9950
http:// www.filss.com
Revised: 1/23/01 Email: sales@filss.com
HIGH PERFORMANCE LOW NOISE PHEMT * ABSOLUTE MAXIMUM RATINGS
Parameter Drain-Source Voltage Gate-Source Voltage Drain-Source Current Gate Current RF Input Power Channel Operating Temperature Storage Temperature Total Power Dissipation Symbol VDS VGS IDS IG PIN TCH TSTG PTOT Test Conditions TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C -- TAmbient = 22 3 C -65 Min Max 4 -2 IDSS 10 100 175 175 460 Units V V mA mA mW C C mW
LPS200
Notes: * Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device. * Power Dissipation defined as: PTOT (PDC + PIN) - POUT, where PDC: DC Bias Power PIN: RF Input Power POUT: RF Output Power * Absolute Maximum Power Dissipation to be de-rated as follows above 25C: PTOT= 460mW - (37mW/C) x THS where THS = heatsink or ambient temperature.
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HANDLING PRECAUTIONS To avoid damage to the devices care should be exercised during handling. Proper Electrostatic Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263. ASSEMBLY INSTRUCTIONS The recommended die attach is gold/tin eutectic solder under a nitrogen atmosphere. Stage temperature should be 280-290C; maximum time at temperature is one minute. The recommended wire bond method is thermo-compression wedge bonding with 0.7 or 1.0 mil (0.018 or 0.025 mm) gold wire. Stage temperature should be 250-260C. APPLICATIONS NOTES & DESIGN DATA Applications Notes are available from your local Filtronic Sales Representative or directly from the factory. Complete design data, including S-parameters, noise data, and large-signal models are available on the Filtronic web site.
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All information and specifications are subject to change without notice. Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/23/01 Email: sales@filss.com

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